mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 193
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
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• Park on master core priority (PARK = 01)—The core retains bus mastership as long
• Park on master DMA priority (PARK = 10)—The DMA module retains bus
Note that the internal DMA has higher priority than the core if the internal DMA has
its bandwidth BWC bits set to 000 (maximum bandwidth).
as it needs it. After it negates its internal bus request, the core does not have to
rearbitrate for the bus unless the DMA module has requested the bus when it is idle.
The DMA module can be granted bus mastership only when the core is not asserting
its bus request. See Figure 6-11.
mastership as long as it needs it. After it negates its internal bus request, the DMA
module does not have to rearbitrate for the bus unless the core has requested the bus
when it is idle. The core can be granted bus mastership only when the DMA module
is not asserting its bus request. See Figure 6-12.
Figure 6-12. Park on DMA Module Priority (PARK = 10)
Figure 6-11. Park on Master Core Priority (PARK = 01)
DMA module BR negated
Core BR negated
Freescale Semiconductor, Inc.
Core
For More Information On This Product,
Core BR negated/asserted
DMA module BR asserted
DMA module BR negated
Core BR asserted
Chapter 6. SIM Overview
Go to: www.freescale.com
Core
DMA module BR negated/asserted
DMA module BR asserted
Core BR negated
Core BR asserted
DMA Module
DMA BR negated
Core BR negated
DMA Module
Programming Model
6-13
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