mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 89
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
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ColdFire processors inhibit sampling for interrupts during the first instruction of all
exception handlers. This allows any handler to effectively disable interrupts, if necessary,
by raising the interrupt mask level contained in the status register.
2.8.1 Exception Stack Frame Definition
The exception stack frame is shown in Figure 2-10. The first longword of the exception
stack frame contains the 16-bit format/vector word (F/V) and the 16-bit status register. The
second longword contains the 32-bit program counter address.
The 16-bit format/vector word contains three unique fields:
1
Vector Numbers
+ 0x04
A7→
The term ‘fault’ refers to the PC of the instruction that caused the exception. The term ‘next’ refers to the PC
of the instruction that immediately follows the instruction that caused the fault.
• Format field—This 4-bit field at the top of the system stack is always written with a
• Fault status field—The 4-bit field, FS[3–0], at the top of the system stack is defined
64–255
62–63
value of {4,5,6,7} by the processor indicating a 2-longword frame format. See
Table 2-19. This field records any longword misalignment of the stack pointer that
may have existed when the exception occurred.
for access and address errors along with interrupted debug service routines. See
Table 2-20.
31
Format
Table 2-18. Exception Vector Assignments (Continued)
Original A7 at Time of
Exception, Bits 1–0
Vector Offset (Hex)
28
0F8–0FC
100–3FC
Figure 2-10. Exception Stack Frame Form
00
01
10
11
27
FS[3–2]
Freescale Semiconductor, Inc.
For More Information On This Product,
Table 2-19. Format Field Encoding
26
25
Vector[7–0]
Chapter 2. ColdFire Core
Go to: www.freescale.com
Stacked Program Counter
Program Counter [31–0]
A7 at First Instruction of
18
Original A[7–10]
Original A[7–11]
Original A[7–8]
Original A[7–9]
17
Next
FS[1–0]
Handler
—
16
15
1
Reserved
User-defined interrupts
Exception Processing Overview
Format Field Bits
Status Register
31–28
0100
0101
0110
0111
Assignment
2-49
0
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