mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 263

• Manufacturer Part Number: mcf5307cft90b
• Description: Mcf5307 Coldfire Integrated Microprocessor User
• Manufacturer: Freescale Semiconductor, Inc

Accesses in synchronous burst page mode always cause the following sequence:
11.4.4.4 Continuous Page Mode
Continuous page mode is identical to burst page mode, except that it allows the processor
core to handle successive bus cycles that hit the same page without having to close the page.
When the current bus cycle finishes, the MCF5307 core internal pipelined bus can predict
whether the upcoming cycle will hit in the same page.
RAS[0] or [1]
1.
2.
3. Required number of
4. Some transfers need more
5.
6. Required number of idle clocks inserted to assure precharge-to-
• If the next bus cycle is not pending or misses in the page, the
• If the next bus cycle is pending and hits in the page, the page is left open, and the
CAS[3:0]
DRAMW
BCLKO
D[31:0]
A[31:0]
SRAS
SCAS
ACTV
NOP
NOP
given port size.
PALL
generated to the SDRAM.
next SDRAM access begins with a
commands to assure SRAS-to-SCAS delay (if CAS latency is 1, there are no
commands).
command
command
ACTV
t
CASL
Chapter 11. Synchronous/Asynchronous DRAM Controller Module
Row
= 2
NOP
Figure 11-19. Burst Write SDRAM Access
Freescale Semiconductor, Inc.
For More Information On This Product,
READ
Column
Go to: www.freescale.com
or
NOP
WRITE
commands to assure the
Column
WRITE
READ
commands to service the transfer size with the
Column
or
WRITE
t
RWL
command.
NOP
Column
ACTV
PALL
-to-precharge delay.
Synchronous Operation
PALL
ACTV
t
command is
RP
delay.
11-29