mcf5307cft90b Freescale Semiconductor, Inc, mcf5307cft90b Datasheet - Page 314
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mcf5307cft90b
Manufacturer Part Number
mcf5307cft90b
Description
Mcf5307 Coldfire Integrated Microprocessor User
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MCF5307CFT90B.pdf
(484 pages)
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Register Descriptions
14.3.1 UART Mode Registers 1 (UMR1n)
The UART mode registers 1 (UMR1n) control configuration. UMR1n can be read or
written when the mode register pointer points to it, at RESET or after a
REGISTER POINTER
pointer points to UMR2n.
14-4
0x1E0–
UART0
0x1EC
0x1FC
0x1F0
0x1F4
0x1F8
UMR1n, UMR2n, and UCSRn should be changed only after the receiver/transmitter is issued a software reset
command. That is, if channel operation is not disabled, undesirable results may occur.
This address is for factory testing. Reading this location results in undesired effects and possible incorrect
transmission or reception of characters. Register contents may also be changed.
Address-triggered commands
MBAR Offset
UART1
0x220–
0x22C
0x23C
0x230
0x234
0x238
Table 14-1. UART Module Programming Model (Continued)
UART registers are accessible only as bytes. Although external
masters cannot access on-chip memories or MBAR, they can
access any UART registers.
Do not access
UART interrupt vector
register—(UIVRn) [p.
14-15]
(Read) UART input
port registers—(UIPn)
[p. 14-15]
(Write) Do not access
(Read) Do not access
(Write) UART output
port bit set command
registers—(UOP1n
[p. 14-15]
(Read) Do not access
(Write) UART output
port bit reset
command
registers—(UOP0n
[p. 14-15]
command using UCRn[MISC]. After UMR1n is read or written, the
[31:24]
Freescale Semiconductor, Inc.
For More Information On This Product,
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Go to: www.freescale.com
MCF5307 User’s Manual
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[23:16]
NOTE:
[15:8]
RESET MODE
[7:0]
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