atf280e ATMEL Corporation, atf280e Datasheet - Page 22
atf280e
Manufacturer Part Number
atf280e
Description
Rad Hard Reprogrammable Fpga
Manufacturer
ATMEL Corporation
Datasheet
1.ATF280E.pdf
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TM
5.
FreeRAM
TM
TM
The ATF280E offers 115Kbits of dual-port RAM called FreeRAM
. The FreeRAM
is made of
32 x 4 dual-ported RAM blocks and dispersed throughout the array as shown in the figure here-
TM
after. This FreeRAM
is SEU hardened.
A 4-bit Input Data Bus connects to four horizontal local buses distributed over four sector rows
(plane 1). A 4-bit Output Data Bus connects to four horizontal local buses distributed over four
sector rows (plane 2). A 5-bit Input Address Bus connects to five vertical express buses in same
column. A 5-bit Output Address Bus connects to five vertical express buses in same column. Ain
(input address) and Aout (output address) alternate positions in horizontally aligned RAM
blocks. For the left-most RAM blocks, Aout is on the left and Ain is on the right. For the right-
most RAM blocks, Ain is on the left and Aout is tied off, thus it can only be configured as a single
port. For single-ported RAM, Ain is the READ/WRITE address port and Din is the (bi-directional)
data port.
Right-most RAM blocks can be used only for single-ported memories. WEN and OEN connect to
the vertical express buses in the same column.
Figure 5-1.
RAM Connections (One RAM Block)
ATF280E
22
7750A–AERO–07/07
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