atf280e ATMEL Corporation, atf280e Datasheet - Page 31

• Manufacturer Part Number: atf280e
• Description: Rad Hard Reprogrammable Fpga
• Manufacturer: ATMEL Corporation

8.2
8.2.1
7750A–AERO–07/07
LVDS I/Os
JTAG
Figure 8-1.
Each LVDS cluster has its dedicated power supply source. LVDS I/Os are powered through
VCCB pads. VDD and VSS power lines are common to all clusters.
The LVDS I/Os are composed of 8 LVDS transceiver (Tx) pairs, 8 receivers (Rx) pairs together
with 4 reference voltages (Vref). The reference voltage must be connected to an accurate 1.25V
voltage to give references to the transceivers and to the receivers.
The LVDS specification complies with the EIA-644 standard requirements.
All LVDS I/Os are 1149.1 compliant. Each I/O may be included or excluded from boundary scan
chain during the configuration of the FPGA.
Dual Use I/O principle
ATF280E
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