ep1c6t144i8es Altera Corporation, ep1c6t144i8es Datasheet - Page 86

no-image

ep1c6t144i8es

Manufacturer Part Number
ep1c6t144i8es
Description
Cyclone Fpga Family
Manufacturer
Altera Corporation
Datasheet
Cyclone FPGA Family Data Sheet
86
Tables 58
row pins for EP1C20 devices.
External I/O Delay Parameters
External I/O delay timing parameters for I/O standard input and output
adders and programmable input and output delays are specified by speed
grade independent of device density.
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
INSU
INH
OUTCO
XZ
ZX
INSUPLL
INHPLL
OUTCOPLL
XZPLL
ZXPLL
INSU
INH
OUTCO
XZ
ZX
INSUPLL
INHPLL
OUTCOPLL
XZPLL
ZXPLL
Table 58. EP1C20 Column Pin Global Clock External I/O Timing Parameters
Table 59. EP1C20 Row Pin Global Clock External I/O Timing Parameters
Symbol
Symbol
through
-6 Speed Grade
-6 Speed Grade
2.226
0.000
2.000
1.138
0.000
0.500
3.584
3.584
2.361
0.000
2.000
1.273
0.000
0.500
3.391
3.391
Min
Min
59
show the external timing parameters on column and
3.926
5.553
5.553
1.957
3.774
5.360
5.360
1.805
Max
Max
-7 Speed Grade
-7 Speed Grade
2.406
0.000
2.000
1.244
0.000
0.500
3.949
3.949
2.561
0.000
2.000
1.399
0.000
0.500
3.729
3.729
Min
Min
4.358
6.149
6.149
2.158
4.184
5.929
5.929
1.984
Max
Max
Preliminary Information
-8 Speed Grade
-8 Speed Grade
2.585
0.000
2.000
1.349
0.000
0.500
4.316
4.316
2.763
0.000
2.000
1.527
0.000
0.500
4.069
4.069
Min
Min
Altera Corporation
4.795
6.748
6.748
2.363
4.597
6.501
6.501
2.165
Max
Max
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

Related parts for ep1c6t144i8es