z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 151
z80189
Manufacturer Part Number
z80189
Description
Z80180, Z8s180, Z8l180 Mpu Operation
Manufacturer
ZiLOG Semiconductor
Datasheet
1.Z80189.pdf
(326 pages)
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ASCI1 Extension Control Register (I/O Address: 13H) (Z8S180/L180-Class Processors
Only)
UM005003-0703
Bit
Position Bit/Field
0
Bit
Bit/Field
R/W
Reset
Note: R = Read W = Write X = Indeterminate ? = Not Applicable
Bit
Position Bit/Field
7
6–5
4
3
Z8018x
Family MPU User Manual
Send
Break
RDRF
Interrupt
Inhibit
Reserved
X1 Bit
Clk
ASCI1
BRG1
Mode
Inhibit
RDRF
R/W
Int
7
0
Each ASCI channel control register B configures multiprocessor mode,
parity and baud rate selection.
R/W
R/W
R/W
R/W
R/W
R/W
?
6
Reserved
Value Description
Value Description
?
0
0
1
0
1
0
0
1
0
1
5
Normal Xmit
Drive TXA Low
RDRF Interrupt Inhibit On
RDRF Interrupt Inhibit Off
Reserved. Must be 0
CKA1 /16 or /64
CKA1 is bit clock
As S180
Enable 16-bit BRG counter
ASCI1
X1 Bit
R/W
Clk
4
0
BRG1
Mode
R/W
3
0
Feature
Enable
Break
R/W
2
0
Detect
Break
(RO)
R/W
1
0
Break
Send
R/W
0
0
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