z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 80

• Manufacturer Part Number: z80189
• Description: Z80180, Z8s180, Z8l180 Mpu Operation
• Manufacturer: ZiLOG Semiconductor

Interrupts
Note:
Lower
Priority
The Z8X180 CPU has twelve interrupt sources, 4 external and 8 internal,
with fixed priority. (Reference Figure 31.)
This section explains the CPU registers associated with interrupt
processing, the TRAP interrupt, interrupt response modes, and the
external interrupts. The detailed discussion of internal interrupt
generation (except TRAP) is presented in the appropriate hardware
section (that is, PRT, DMAC, ASCI, and CSI/O).
Figure 31.
Interrupt Control Registers and Flags. The Z8X180 has three registers and
two flags which are associated with interrupt processing.
Higher
Priority
(10)
(11)
(12)
Packages not containing an A19 pin or situations using TOUT
instead of A18 yield an address capable of only addressing 512K
of physical space.
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
Interrupt Sources
TRAP (Undefined Op Code Trap)
NMI (Non Maskable Interrupt)
INT0 (Maskable Interrupt Level 0)
INT1 (Maskable Interrupt Level 1)
INT2 (Maskable Interrupt Level 2)
Timer 0
Timer 1
DMA channel 0
DMA channel 1
Clocked Serial I/O Port
Asynchronous SCI channel 0
Asynchronous SCI channel 1
Family MPU User Manual
Internal Interrupt
Internal Interrupt
External Interrupt
UM005003-0703
Z8018x
65