z80189 ZiLOG Semiconductor, z80189 Datasheet - Page 87

• Manufacturer Part Number: z80189
• Description: Z80180, Z8s180, Z8l180 Mpu Operation
• Manufacturer: ZiLOG Semiconductor

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UM005003-0703
A0
D0
Z8018x
Family MPU User Manual
MREQ
–
–
A19
WR
Phi
RD
D7
MI
T1 T2 T3
3rd Op Code
Fetch Cycle
Undefined
Op Code
Figure 33.
External Interrupts
The Z8X180 features four external hardware interrupt inputs:
•
•
•
•
NMI, INT1, and INT2 feature fixed interrupt response modes. INT0 has 3
different software programmable interrupt response modes—Mode 0,
Mode 1 and Mode 2.
NMI - Non-Maskable Interrupt
The
software. When
PC
NMI–Non-maskable interrupt
INT0–Maskable Interrupt Level 0
INT1–Maskable Interrupt Level 1
INT2–Maskable Interrupt Level 2
NMI
T1 T2 TTP
interrupt input is edge-sensitive and cannot be masked by
Read Cycle
Memory
TRAP Timing - 3rd Op Code Undefined
IX+d, IY+d
NMI
T3
is detected, the Z8X180 operates as follows:
T1
Ti
Ti
Ti
T1
T2
SP-1
PCH
PC stacking
T3
T1 T2
SP-2
PCL
T3
T1 T2 T3
Restart from 0000H
Op Code
fetch cycle
0000H