mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 194

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mc68hc908as60

Manufacturer Part Number
mc68hc908as60
Description
Mc68hc908as60 Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Monitor ROM (MON)
13.4.1 Entering Monitor Mode
Technical Data
NOTE:
Table 13-1
Enter monitor mode by either:
Once out of reset, the MCU waits for the host to send eight security bytes
(see
signal (10 consecutive logic 0s) to the host computer, indicating that it is
ready to receive a command.
Monitor mode uses alternate vectors for reset, SWI, and break interrupt.
The alternate vectors are in the $FE page instead of the $FF page and
allow code execution from the internal monitor firmware instead of user
code. The COP module is disabled in monitor mode as long as V
24.5 5.0 Volt DC Electrical
IRQ pin or the RST pin. See
(SIM)
Holding the PTC3 pin low when entering monitor mode causes a bypass
of a divide-by-two stage at the oscillator. The CGMOUT frequency is
equal to the CGMXCLK frequency, and the OSC1 input directly
generates internal bus clocks. In this case, the OSC1 signal must have
a 50 percent duty cycle at maximum bus frequency.
1. For V
Freescale Semiconductor, Inc.
V
V
HI
HI
For More Information On This Product,
13.4.7
(1)
(1)
Executing a software interrupt instruction (SWI), or
Applying a logic 0 and then a logic 1 to the RST pin
for more information on modes of operation.
HI
, see
1
1
shows the pin conditions for entering monitor mode.
Security). After the security bytes, the MCU sends a break
Go to: www.freescale.com
24.5 5.0 Volt DC Electrical Characteristics
0
0
Monitor ROM (MON)
1
1
Table 13-1. Mode Selection
1
0
Monitor
Monitor
Mode
Characteristics), is applied to either the
Section 9. System Integration Module
CGMXCLK
---------------------------- -
2
CGMXCLK
CGMOUT
or
MC68HC908AS60 — Rev. 1.0
and
CGMVCLK
---------------------------- -
24.2 Maximum
2
Frequency
CGMOUT
------------------------- -
CGMOUT
------------------------- -
Ratings.
Bus
HI
2
2
(see

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