mc68hc908as60 Freescale Semiconductor, Inc, mc68hc908as60 Datasheet - Page 342

• Manufacturer Part Number: mc68hc908as60
• Description: Mc68hc908as60 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Byte Data Link Controller-Digital (BDLC-D)
21.5.3.1 Logic 0
21.5.3.2 Logic 1
Technical Data
(EOF), and inter-frame separation (IFS) symbols always will be encoded
at an assigned level and length. See
Each message will begin with an SOF symbol, an active symbol, and,
therefore, each data byte (including the CRC byte) will begin with a
passive bit, regardless of whether it is a logic 1 or a logic 0.
All VPW bit lengths stated in the following descriptions are typical values
at a 10.4-kbps bit rate. EOF, EOD, IFS, and IDLE, however, are not
driven J1850 bus states. They are passive bus periods observed by
each node’s CPU.
A logic 0 is defined as either:
See
A logic 1 is defined as either:
See
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Freescale Semiconductor, Inc.
Figure 21-7 (a).
Figure 21-7
For More Information On This Product,
Byte Data Link Controller-Digital (BDLC-D)
An active-to-passive transition followed by a passive period 64 s
in length, or
A passive-to-active transition followed by an active period 128 s
in length
An active-to-passive transition followed by a passive period
128 s in length, or
A passive-to-active transition followed by an active period 64 s in
length
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(b).
Figure
21-7.
MC68HC908AS60 — Rev. 1.0