mc68hc908mr8 Freescale Semiconductor, Inc, mc68hc908mr8 Datasheet - Page 126

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mc68hc908mr8

Manufacturer Part Number
mc68hc908mr8
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Clock Generator Module (CGM)
8.6.1 PLL Control Register
Technical Data
126
Notes:
$005E
Addr.
1. When AUTO = 0, PLLIE is forced to logic 0 and is read-only.
2. When AUTO = 0, PLLF and LOCK read as logic 0.
3. When AUTO = 1, ACQ is read-only.
4. When PLLON = 0 or VRS[7:4] = $0, BCS is forced to logic 0 and is read-only.
5. When PLLON = 1, the PLL programming register is read-only.
6. When BCS = 1, PLLON is forced set and is read-only.
PLL Programming Register
Register Name
See page 131.
The PLL control register (PCTL) contains the interrupt enable and flag
bits, the on/off switch, and the base clock selector bit.
Reset:
dress:
Read:
Write:
(PPG)
Ad-
Figure 8-4. CGM I/O Register Summary
$005C
PLLIE
Bit 7
Read
Write
R
0
Re-
set:
Clock Generator Module (CGM)
:
:
Figure 8-5. PLL Control Register (PCTL)
MUL7
= Reserved
Bit 7
PLLF
R
0
R
6
0
= Reserved
MUL6
PLLON
6
1
5
1
MUL5
5
1
BCS
4
0
MUL4
4
0
R
3
1
1
VRS7
0
3
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
R
2
1
1
VRS6
2
1
VRS5
R
1
1
1
1
1
VRS4
Bit 0
Bit 0
R
1
1
0

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