mc68hc908mr8 Freescale Semiconductor, Inc, mc68hc908mr8 Datasheet - Page 166

• Manufacturer Part Number: mc68hc908mr8
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Pulse-Width Modulator for Motor Control
Technical Data
166
NOTE:
The filtered fault pin’s logic state is reflected in the respective FPINx bit.
Any write to this bit is overwritten by the pin state. The FFLAGx event bit
is set with each rising edge of the respective fault pin after filtering has
been applied. To clear the FFLAGx bit, the user must write a 1 to the
corresponding FTACKx bit.
If the FINTx bit is set, a fault condition resulting in setting the
corresponding FFLAG bit will also latch a CPU interrupt request. The
interrupt request latch is not cleared until one of these actions occurs:
If prior to a vector fetch the interrupt request latch is cleared by one of
the above actions, a CPU interrupt will no longer be requested. A vector
fetch does not alter the state of the PWMs, the FFLAGx event flag, or
FINTx.
If the FFLAGx or FINTx bits are not cleared during the interrupt service
routine, the interrupt request latch will not be cleared.
FILTERED FAULT PIN
Pulse-Width Modulator for Motor Control (PWMMC)
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The FFLAGx bit is cleared by writing a 1 to the corresponding
FTACKx bit.
The FINTx bit is cleared. (This will not clear the FFLAGx bit.)
Reset — A reset automatically clears all four interrupt latches.
PWM(s) ENABLED
Figure 9-24. PWM Disabling in Automatic Mode
PWM(S) DISABLED (INACTIVE)
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
PWM(S) ENABLED