mc68hc908mr8 Freescale Semiconductor, Inc, mc68hc908mr8 Datasheet - Page 332

• Manufacturer Part Number: mc68hc908mr8
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Break (BRK)
20.4.2 CPU During Break Interrupts
20.4.3 TIM During Break Interrupts
20.4.4 COP During Break Interrupts
Technical Data
332
Note: Writing a logic 0 clears
$FE0
$FE0
D
E
Break Address Regis-
Break Status and
Control Register
ter Low (BRKL)
See page 334.
See page 333.
(BRKSCR)
BW.
The CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in
progress. If the break address register match occurs on the last cycle of
a CPU instruction, the break interrupt begins immediately.
A break interrupt stops the timer counters.
The COP is disabled during a break interrupt when V
the RST pin.
Read
Read
Write
Write
Re-
set:
Re-
set:
•
•
:
:
:
:
Figure 20-2. I/O Register Summary
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC and $FFFD ($FEFC and
$FEFD in monitor mode)
BRKE
Bit 7
0
0
= Unimplemented
BRKA
6
0
0
Break (BRK)
5
0
0
0
R
4
0
0
0
= Reserved
3
0
0
0
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
2
0
0
0
TST
is present on
1
0
0
0
Bit 0
0
0
0