mc68hc908mr8 Freescale Semiconductor, Inc, mc68hc908mr8 Datasheet - Page 170
mc68hc908mr8
Manufacturer Part Number
mc68hc908mr8
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC68HC908MR8.pdf
(372 pages)
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Pulse-Width Modulator for Motor Control
9.9 PWM Operation in Wait Mode
9.10 PWM Operation in Stop Mode
Technical Data
170
NOTE:
NOTE:
When the PWMEN bit is cleared, the following will occur:
When PWMEN is cleared, these features remain active:
The PWMF flag and pending CPU interrupts are NOT cleared when
PWMEN = 0.
When the microcontroller is put in low-power wait mode via the WAIT
instruction, all clocks to the PWM module will continue to run. If an
interrupt is issued from the PWM module (via a reload or a fault), the
microcontroller will exit wait mode.
Clearing the PWMEN bit before entering wait mode will reduce power
consumption in wait mode because the counter, prescaler divider, and
LDFQ divider will no longer be clocked. In addition, power will be
reduced because the PWMs will no longer toggle.
When the microcontroller is put in low-power wait mode via the STOP
instruction, all clocks to the PWM module will stop.
It is imperative that the program to clear the PWMEN bit before entering
stop mode. Leaving the PWM module enabled during stop mode can
destroy power stages connected to the PWM outputs. The PWM
generator will no longer be clocked during stop mode and the PWM
outputs will no longer toggle.
Pulse-Width Modulator for Motor Control (PWMMC)
•
•
•
•
•
•
PWM pins will be three-stated unless OUTCTL = 1.
PWM counter is cleared and will not be clocked.
Internally, the PWM generator will force its outputs to 0 to avoid
glitches when the PWMEN is set again.
All fault circuitry
Manual PWM pin control via the PWMOUT register
Dead-time insertion when PWM pins change via the PWMOUT
register
MC68HC908MR8 — Rev 4.1
Freescale Semiconductor
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