mc68hc05jb4p Freescale Semiconductor, Inc, mc68hc05jb4p Datasheet - Page 88

• Manufacturer Part Number: mc68hc05jb4p
• Description: Mc68hc705jb4 Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

GENERAL RELEASE SPECIFICATION
10.5.5 USB Control Register 1 (UCR1)
T0SEQ — Endpoint 0 Transmit Sequence Bit
STALL0 — Endpoint 0 Force Stall Bit
TX0E — Endpoint 0 Transmit Enable
RX0E — Endpoint 0 Receive Enable
TP0SIZ3-TP0SIZ0 — Endpoint 0 Transmit Data Packet Size
UCR1
$003C
This read/write bit determines which type of data packet (DATA0 or DATA1) will
be sent during the next IN transaction. Toggling of this bit must be controlled by
software. Reset clears this bit.
This read/write bit causes Endpoint 0 to return a STALL handshake when
polled by either an IN or OUT token by the USB Host Controller. The USB hard-
ware clears this bit when a SETUP token is received. Reset clears this bit.
This read/write bit enables a transmit to occur when the USB Host controller
sends an IN token to Endpoint 0. Software should set this bit when data is
ready to be transmitted. It must be cleared by software when no more Endpoint
0 data needs to be transmitted.
If this bit is 0 or the TXD0F is set, the USB will respond with a NAK handshake
to any Endpoint 0 IN tokens. Reset clears this bit.
This read/write bit enables a receive to occur when the USB Host controller
sends an OUT token to Endpoint 0. Software should set this bit when data is
ready to be received. It must be cleared by software when data cannot be
received.
If this bit is 0 or the RXD0F is set, the USB will respond with a NAK handshake
to any Endpoint 0 OUT tokens. Reset clears this bit.
These read/write bits store the number of transmit data bytes for the next IN
token request for Endpoint 0. These bits are cleared by reset.
reset:
1 = DATA1 Token active for next Endpoint 0 transmit
0 = DATA0 Token active for next Endpoint 0 transmit
1 = Send STALL handshake
0 = Default
1 = Data is ready to be sent.
0 = Data is not ready. Respond with NAK.
1 = Data is ready to be received.
0 = Not ready for data. Respond with NAK.
W
R
T1SEQ ENDADD
BIT 7
0
Freescale Semiconductor, Inc.
Figure 10-24. USB Control Register 1 (UCR1)
For More Information On This Product,
UNIVERSAL SERIAL BUS MODULE
BIT 6
0
Go to: www.freescale.com
February 24, 1999
TX1E
BIT 5
0
FRESUM TP1SZ3 TP1SIZ2 TP1SIZ1 TP1SIZ0
BIT 4
0
BIT 3
0
BIT 2
0
BIT 1
0
BIT 0
REV
0