dp83848qsqx/nopb National Semiconductor Corporation, dp83848qsqx/nopb Datasheet - Page 15

• Manufacturer Part Number: dp83848qsqx/nopb
• Description: Phyter Extended Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
• Manufacturer: National Semiconductor Corporation

8.4 LED INTERFACE
The DP83848Q supports a configurable Light Emitting Diode
(LED) pin link and activity. The PHY Control Register (PHY-
The LED_LINK pin in Mode 1 indicates the link status of the
port. In 100BASE-T mode, link is established as a result of
input receive amplitude compliant with the TP-PMD specifi-
cations which will result in internal generation of signal detect.
A 10 Mb/s Link is established as a result of the reception of
at least seven consecutive normal Link Pulses or the recep-
tion of a valid 10BASE-T packet. This will cause the assertion
of LED_LINK. LED_LINK will deassert in accordance with the
Link Loss Timer as specified in the IEEE 802.3 specification.
The LED_LINK pin in Mode 1 will be OFF when no LINK is
present.
The LED_LINK pin in Mode 2 will be ON to indicate Link is
good and BLINK to indicate activity is present on activity.
Since the LED pin is also used as a strap option, the polarity
of the LED is dependent on whether the pin is pulled up or
down.
8.4.1 LEDs
Since the Auto-Negotiation (AN) strap option shares the LED
output pin, the external components required for strapping
and LED usage must be considered in order to avoid con-
tention.
Specifically, when the LED output is used to drive the LED
directly, the active state of the output driver is dependent on
the logic level sampled by the AN0 input upon power-up/reset.
For example, if the AN0 input is resistively pulled low then the
output will be configured as an active high driver. Conversely,
if the AN0 input is resistively pulled high, then the output will
be configured as an active low driver.
Mode
1
2
FIGURE 1. PHYAD Strapping Example
LED_CFG (bit 5) or
TABLE 3. LED Mode Selection
(pin 33)
1
0
15
ON for Good Link
OFF for No Link
ON for Good Link
BLINK for Activity
CR) for the LEDs can also be selected through address 19h,
bits [6:5].
See
Refer to
external components. In this example, the AN0 strapping re-
sults in Auto-Negotiation enabled with 10/100 Half/Full-Du-
plex advertised .
The adaptive nature of the LED outputs helps to simplify po-
tential implementation issues of these dual purpose pins.
FIGURE 2. AN0 Strapping and LED Loading Example
Table 3
LED_LINK
Figure 2
for LED Mode selection.
for an example of an AN0 connection to
30152502
30152503
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