dp83848qsqx/nopb National Semiconductor Corporation, dp83848qsqx/nopb Datasheet - Page 49

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dp83848qsqx/nopb

Manufacturer Part Number
dp83848qsqx/nopb
Description
Phyter Extended Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
15:8
Bit
15
14
13
12
7:6
1:0
Bit
13.2.9 CD Test and BIST Extensions Register (CDCTRL1)
This register controls test modes for the 10BASE-T Common Driver. In addition it contains extended control and status for the
packet BIST function.
13.2.10 Energy Detect Control (EDCR)
This register provides control and status for the Energy Detect function.
5
4
3
2
BIST_ERROR_COUNT
BIST_CONT_MODE
10MEG_PATT_GAP
ED_AUTO_DOWN
CDPATTSEL[1:0]
ED_AUTO_UP
CDPATTEN_10
RESERVED
RESERVED
Bit Name
ED_MAN
Bit Name
ED_EN
TABLE 29. CD Test and BIST Extensions Register (CDCTRL1), address 0x1Bh
TABLE 30. Energy Detect Control (EDCR), address 0x1Dh
0, RW/SC
Default
Default
0, RW
1, RW
1, RW
00, RW
0, RW
0, RW
0, RW
0, RW
0, RW
0, RO
Energy Detect Enable:
Allow Energy Detect Mode.
When Energy Detect is enabled and Auto-Negotiation is disabled via
the BMCR register, Auto-MDIX should be disabled via the PHYCR
register.
Energy Detect Automatic Power Up:
Automatically begin power up sequence when Energy Detect Data
Threshold value (EDCR[3:0]) is reached. Alternatively, device could be
powered up manually using the ED_MAN bit (ECDR[12]).
Energy Detect Automatic Power Down:
Automatically begin power down sequence when no energy is detected.
Alternatively, device could be powered down using the ED_MAN bit
(EDCR[12]).
Energy Detect Manual Power Up/Down:
Begin power up/down sequence when this bit is asserted. When set,
the Energy Detect algorithm will initiate a change of Energy Detect state
regardless of threshold (error or data) and timer values.
BIST ERROR Counter:
Counts number of errored data nibbles during Packet BIST. This value
will reset when Packet BIST is restarted. The counter sticks when it
reaches its max count.
RESERVED: Must be zero.
Packet BIST Continuous Mode:
Allows continuous pseudo random data transmission without any break
in transmission. This can be used for transmit VOD testing. This is used
in conjunction with the BIST controls in the PHYCR Register (19h). For
10Mb operation, jabber function must be disabled, bit 0 of the
10BTSCR (1Ah), JABBER_DIS = 1.
CD Pattern Enable for 10Mb:
1 = Enabled.
0 = Disabled.
RESERVED: Must be zero.
Defines gap between data or NLP test sequences:
1 = 15 µs.
0 = 10 µs.
CD Pattern Select[1:0]:
If CDPATTEN_10 = 1:
00 = Data, EOP0 sequence.
01 = Data, EOP1 sequence.
10 = NLPs.
11 = Constant Manchester 1s (10 MHz sine wave) for harmonic
distortion testing.
49
Description
Description
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