dp83848qsqx/nopb National Semiconductor Corporation, dp83848qsqx/nopb Datasheet - Page 31

• Manufacturer Part Number: dp83848qsqx/nopb
• Description: Phyter Extended Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
• Manufacturer: National Semiconductor Corporation

12.0 Reset Operation
The DP83848Q includes an internal power-on reset (POR)
function and does not need to be explicitly reset for normal
operation after power up. If required during normal operation,
the device can be reset by a hardware or software reset.
12.1 HARDWARE RESET
A hardware reset is accomplished by applying a low pulse
(TTL level), with a duration of at least 1 µs, to the RESET_N
pin. This will reset the device such that all registers will be
reinitialized to default values and the hardware configuration
values will be re-latched into the device (similar to the power-
up/reset operation).
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12.2 SOFTWARE RESET
A software reset is accomplished by setting the reset bit (bit
15) of the Basic Mode Control Register (BMCR). The period
from the point in time when the reset bit is set to the point in
time when software reset has concluded is approximately
1 µs.
A software reset will reset the device such that all registers
will be reset to default values and the hardware configuration
values will be maintained. Software driver code must wait 3
µs following a software reset before allowing further serial MII
operations with the DP83848Q.
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