dp83848qsqx/nopb National Semiconductor Corporation, dp83848qsqx/nopb Datasheet - Page 54

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dp83848qsqx/nopb

Manufacturer Part Number
dp83848qsqx/nopb
Description
Phyter Extended Temperature Single Port 10/100 Mb/s Ethernet Physical Layer Transceiver
Manufacturer
National Semiconductor Corporation
Datasheet
www.national.com
T2.2.1
T2.2.2
T2.2.3
T2.2.4
Parameter
15.2.2 Reset Timing
Note: It is important to choose pull-up and/or pull-down resistors for each of the hardware configuration pins that provide fast RC time constants in order to latch-
in the proper value prior to the pin transitioning to an output driver.
Post RESET Stabilization time prior to
MDC preamble for register accesses
Hardware Configuration Latch-in Time
from the Deassertion of RESET (either
soft or hard)
Hardware Configuration pins transition
to output drivers
RESET pulse width
Description
MDIO is pulled high for 32-bit serial
management initialization
Hardware Configuration Pins are
described in the Pin Description
section
X1 Clock must be stable for at min.
of 1us during RESET pulse low
time.
54
Notes
Min
1
Typ
50
3
3
Max
30152521
Units
µs
µs
ns
µs

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