adau1361 Analog Devices, Inc., adau1361 Datasheet - Page 21

• Manufacturer Part Number: adau1361
• Description: Stereo, Low Power, 96 Khz, 24-bit Audio Codec With Integrated Pll
• Manufacturer: Analog Devices, Inc.

THEORY OF OPERATION
The ADAU1361 is an audio codec offering high quality audio,
low power, and small package size. The stereo ADC and stereo
DAC each have an SNR of at least +100 dB and a THD + N of at
least −90 dB. The serial data port is compatible with I
justified, right-justified, and TDM modes for interfacing to
digital audio data. The operating voltage range is 1.8 V to
3.65 V, with an on-board regulator generating the internal
digital supply voltage.
The record signal path includes very flexible input configurations
that can accept differential and single-ended analog microphone
inputs as well as a digital microphone input. A microphone bias
pin provides seamless interfacing to electret microphones. Input
configurations can accept up to six single-ended analog signals
or variations of stereo differential or stereo single-ended signals
with two additional auxiliary single-ended inputs. Each input
signal has its own programmable amplifier (PGA) for volume
adjustment and can be routed directly to the playback path
output mixers, bypassing the ADCs. An automatic level control
(ALC) can also be implemented to keep the recording volume
constant.
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The ADCs and DACs are high quality, 24-bit Σ-Δ converters
that operate at selectable 64× or 128× oversampling rates. The
base sampling rate of the converters is set by the input clock rate
and can be further scaled with the converter control register
settings. The converters can operate at sampling frequencies
from 8 kHz to 96 kHz. The ADCs and DACs also include very
fine-step digital volume controls.
The playback path allows input signals and DAC outputs to be
mixed into various output configurations. Headphone drivers
are available for a stereo headphone output, and the other
output pins are capable of differentially driving an earpiece
speaker. Capless headphone outputs are possible with the use of
the mono output as a virtual ground connection. The stereo line
outputs can be used as either single-ended or differential
outputs and as an optional mix-down mono output.
The ADAU1361 can generate its internal clocks from a wide
range of input clocks by using the on-board fractional PLL.
The PLL accepts inputs from 8 MHz to 27 MHz.
The ADAU1361 is provided in a small, 32-lead, 5 mm × 5 mm
LFCSP with an exposed bottom pad.
ADAU1361