adau1361 Analog Devices, Inc., adau1361 Datasheet - Page 51

• Manufacturer Part Number: adau1361
• Description: Stereo, Low Power, 96 Khz, 24-bit Audio Codec With Integrated Pll
• Manufacturer: Analog Devices, Inc.

R9: Right Differential Input Volume Control 16399 (0x400F)
This register enables the differential path and sets the volume control for the right differential PGA input.
Bit 7
Table 36. Right Differential Input Volume Control Register
Bit
[7:2]
1
0
R10: Record Microphone Bias Control 16400 (0x4010)
This register controls the MICBIAS pin settings for biasing electret type analog microphones.
Bit 7
Table 37. Record Microphone Bias Control Register
Bit
3
2
0
Bit Name
RDMUTE
RDEN
Bit Name
MPERF
MBI
MBIEN
RDVOL[5:0]
Bit 6
Bit 6
Description
M
m
0
1
M
0 = 0.90 × AVDD (default).
1 = 0. 65 × AVDD.
Enables the MICBIAS output.
0
1 = enabled.
Description
Right channel
and RINN (negative signal) pins. Each step corresponds to a 0.75 dB increase in gain. See Table 70 for a com
list of the volume settings.
Setting
000000
000001
…
010000
…
111110
111111
Right diff
0 = m
1 = u
Right differential PGA enable. When enabled, the RINP and RINN pins are used as a full differential pair.
When
0 = e
1 = d
= normal operation (default).
= high performance.
= disabl
icrophone bia
ore current to the microphone.
icrophon
Reser ved
nabled (default).
nmute.
isabled.
ute (default).
disabled, these two pins
Bit 5
Bit 5
ed (default).
erential input mute co
e voltage bias as a frac
differential PGA input volume control. The right differential input uses the RINP (positive signal)
s is enabled for high performance or normal operation. High performance operation sources
RDVOL
[5:0]
Bit 4
Bit 4
are configur
ntrol.
Volume
−12 dB (default
−11.2
…
0 dB
…
34.5 dB
35.25 dB
tion of AV
Rev. 0 | Page 51 of 80
5 dB
DD.
Bit 3
ed as two single-ended inputs.
Bit 3
MPERF
)
Bit 2
Bit 2
MBI
Bit 1
RDMU
Bit 1
Reserved
TE
ADAU1361
Bit 0
RDEN
Bit 0
MBIEN
plete