lan9303m Standard Microsystems Corp., lan9303m Datasheet - Page 54

• Manufacturer Part Number: lan9303m
• Description: Small Form Factor Three Port 10/100 Managed Ethernet Switch With Dual Mii/rmii/turbo Mii
• Manufacturer: Standard Microsystems Corp.

Revision 1.3 (08-27-09)
STRAP NAME
speed_strap_1
duplex_strap_1
duplex_pol_strap_1
BP_EN_strap_1
Table 4.2 Soft-Strap Configuration Strap Definitions (continued)
DESCRIPTION
Port 1 Speed Select Strap: This strap configures the
default value of the
Basic Control Register
This strap may affect the default value of the following
register bits (x=1):
Refer to the respective register definition sections for
additional information.
Port 1 Duplex Select Strap: This strap affects the default
value of the following register bits (x=1):
Refer to the respective register definition sections for
additional information.
This strap affects the default value of the
of the
(P1_MII_BASIC_CONTROL). It also determines the polarity
of the P1_DUPLEX pin in MII MAC mode.
Port 1 Backpressure Enable Strap: Configures the
default value for the
(BP_EN_1)
(MANUAL_FC_1).
Speed Select LSB (PHY_SPEED_SEL_LSB)
Port x PHY Basic Control Register
(PHY_BASIC_CONTROL_x)
PHY Mode (MODE[2:0])
Modes Register (PHY_SPECIAL_MODES_x)
10BASE-T Full Duplex
the
(PHY_AN_ADV_x)
Duplex Mode (PHY_DUPLEX)
Control Register (PHY_BASIC_CONTROL_x)
PHY Mode (MODE[2:0])
Modes Register (PHY_SPECIAL_MODES_x)
10BASE-T Full Duplex
Negotiation Advertisement Register (PHY_AN_ADV_x)
Port x PHY Auto-Negotiation Advertisement Register
Port 1 MII Basic Control Register
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
bit of the
DATASHEET
Speed Select LSB
Port 1 Backpressure Enable
Port 1 Manual Flow Control Register
(P1_MII_BASIC_CONTROL).
54
and
bit of the
bits of the
bits of the
10BASE-T Half Duplex
bit of the
Port x PHY Auto-
Port x PHY Special
Port x PHY Special
bit of the
Port x PHY Basic
Duplex Mode
bit of the
Port 1 MII
bits of
SMSC LAN9303M/LAN9303Mi
bit
PIN / DEFAULT
VALUE
1b
1b when in internal
PHY mode
(P1_MODE[2:0] =
111b)
else
DUPLEX_POL_1
when in MII PHY,
RMII PHY, or MII
MAC mode
1b
Datasheet