lan9303m Standard Microsystems Corp., lan9303m Datasheet - Page 57

• Manufacturer Part Number: lan9303m
• Description: Small Form Factor Three Port 10/100 Managed Ethernet Switch With Dual Mii/rmii/turbo Mii
• Manufacturer: Standard Microsystems Corp.

Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
Datasheet
SMSC LAN9303M/LAN9303Mi
STRAP NAME
FD_FC_strap_2
manual_FC_strap_2
speed_strap_0
duplex_pol_strap_0
Table 4.2 Soft-Strap Configuration Strap Definitions (continued)
DESCRIPTION
Port 2 Full-Duplex Flow Control Enable Strap: This strap
is used to configure the default value of the following
register bits:
This strap may affect the default value of the following
register bits (x=2):
Refer to the respective register definition sections for
additional information.
Port 2 Manual Flow Control Enable Strap: Configures the
default value of the
Select (MANUAL_FC_2)
Control Register
This strap affects the default value of the following register
bits (x=2):
Port 0 (External MII) Speed Select Strap: This strap
affects the default value of the following bits in the
PHY Auto-Negotiation Link Partner Base Page Ability
Register
Refer to
information.
This strap also configures the speed for Port 0 when Virtual
Auto-Negotiation fails. Refer to
Detection," on page 110
Port 0 (External MII) Duplex Polarity Strap: This strap
determines the polarity of the P0_DUPLEX pin in MII MAC
mode and affects the default value of the following bits in
the
Ability Register
Refer to
information.
Port 2 Full-Duplex Transmit Flow Control Enable
(TX_FC_2)
Enable (RX_FC_2)
Register (MANUAL_FC_2)
Asymmetric Pause
Advertisement Register (PHY_AN_ADV_x)
Asymmetric Pause
x PHY Auto-Negotiation Advertisement Register
(PHY_AN_ADV_x).
100BASE-X Full Duplex
100BASE-X Half Duplex
10BASE-T Full Duplex
10BASE-T Half Duplex
100BASE-X Full Duplex
100BASE-X Half Duplex
10BASE-T Full Duplex
10BASE-T Half Duplex
Virtual PHY Auto-Negotiation Link Partner Base Page
Section 13.2.6.6
Section 13.2.6.6
(VPHY_AN_LP_BASE_ABILITY):
and
(VPHY_AN_LP_BASE_ABILITY):
DATASHEET
(MANUAL_FC_2).
Port 2 Full-Duplex Receive Flow Control
Port 2 Full-Duplex Manual Flow Control
bit of the
bits of the
and
57
for additional information.
bit in the
Symmetric Pause
and
and
.
Port x PHY Auto-Negotiation
Table 13.7
Table 13.7
Port 2 Manual Flow Control
Section 7.3.1.1, "Parallel
Port 2 Manual Flow
for more
for more
bits of the
Virtual
Port
PIN / DEFAULT
VALUE
1b
0b
1b
DUPLEX_POL_0
Revision 1.3 (08-27-09)