lan9303m Standard Microsystems Corp., lan9303m Datasheet - Page 80
lan9303m
Manufacturer Part Number
lan9303m
Description
Small Form Factor Three Port 10/100 Managed Ethernet Switch With Dual Mii/rmii/turbo Mii
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9303M.pdf
(380 pages)
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Revision 1.3 (08-27-09)
6.4.3.1
6.4.3.2
6.4.3.3
6.4.3.4
Port Default Priority
As detailed in
value. The PVID table is read and written by using the
(SWE_VLAN_CMD),
Engine VLAN Read Data Register
Status Register
13.4.3.11, on page 298
IP Precedence Based Priority
The transmit priority queue can be chosen based on the Precedence bits of the IPv4 TOS octet. This
is supported for tagged and non-tagged packets for both type field and length field encapsulations. The
Precedence bits are the three most significant bits of the IPv4 TOS octet.
DIFFSERV Based Priority
The transmit priority queue can be chosen based on the DIFFSERV usage of the IPv4 TOS or IPv6
Traffic Class octet. This is supported for tagged and non-tagged packets for both type field and length
field encapsulations.
The DIFFSERV table is used to determine the packet priority from the 6-bit Differentiated Services (DS)
field. The DS field is defined as the six most significant bits of the IPv4 TOS octet or the IPv6 Traffic
Class octet and is used as an index into the DIFFSERV table. The output of the DIFFSERV table is
then used as the priority. This priority is then passed through the Traffic Class table to select the
transmit priority queue.
Note: The DIFFSERV table is not initialized upon reset or power-up. If DIFFSERV is enabled, then
The DIFFSERV table is read and written by using the
Register
(SWE_DIFFSERV_TBL_WR_DATA),
(SWE_DIFFSERV_TBL_RD_DATA), and
(SWE_DIFFSERV_TBL_CMD_STS). Refer to
13.4.3.15, on page 302
VLAN Priority
As detailed in
tag. The VLAN priority is sent through a per port Priority Regeneration table, which is used to map the
VLAN priority into a user defined priority.
The Priority Regeneration table is programmed by using the
Priority Regeneration Table Register
VLAN Priority Regeneration Table Register
2 Ingress VLAN Priority Regeneration Table Register
Section 13.4.3.33, on page 322
these registers.
the full table must be initialized by the host.
(SWE_DIFFSERV_TBL_CFG),
Figure
Figure
(SWE_VLAN_CMD_STS). Refer to
6.5, the default priority is based on the ingress port’s priority bits in its port VID
6.5, the transmit priority queue can be taken from the priority field of the VLAN
Switch Engine VLAN Write Data Register
for detailed VLAN register descriptions.
for detailed DIFFSERV register descriptions.
Small Form Factor Three Port 10/100 Managed Ethernet Switch with Dual MII/RMII/Turbo MII
through
DATASHEET
(SWE_VLAN_RD_DATA), and
(SWE_INGRSS_REGEN_TBL_0),
Switch Engine DIFFSERV Table Read Data Register
Switch Engine DIFFSERV Table Command Status Register
Section 13.4.3.35, on page 324
80
(SWE_INGRSS_REGEN_TBL_1), and
Switch Engine DIFFSERV Table Write Data Register
Section 13.4.3.12, on page 299
Section 13.4.3.8, on page 294
Switch Engine DIFFSERV Table Command
(SWE_INGRSS_REGEN_TBL_2). Refer to
Switch Engine VLAN Command Register
Switch Engine Port 0 Ingress VLAN
(SWE_VLAN_WR_DATA),
Switch Engine VLAN Command
Switch Engine Port 1 Ingress
for detailed descriptions of
SMSC LAN9303M/LAN9303Mi
Switch Engine Port
through
through
Datasheet
Section
Section
Switch
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