peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 244
peb20534h-52
Manufacturer Part Number
peb20534h-52
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20534H-52.pdf
(439 pages)
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Data Sheet
SPRI
CHN(1:0)
Select Priority
This bit selects one DMA channel (transmit and receive) as a high priority
channel. The dedicated channel 3..0 is selected via bit field ’CHN’.
If enabled, the selected serial channel (SCCi) is serviced by the DMA
controller with high priority, whereas the remaining channels are in a
second round-robbin priority group:
SPRI=’0’
SPRI=’1’
Channel Number (for highest priority)
This bit field is only valid if bit ’SPRI’ is set to ’1’ and specifies the serial
channel which is serviced with highest priority by the DMA controller:
CHN=’00’
CHN=’01’
CHN=’10’
CHN=’11’
No SCC is selected as high priority channel. All SCCs are
serviced in a round-robbin manner.
Bit field ’CHN’ is don’t care.
The SCC selected via bit field ’CHN’ is serviced as high
priority channel, i.e. requests to central receive and
transmit FIFOs are priorized against the other channels.
Channel 0 (transmit and receive) is selected as high
priority channel.
Channel 1 (transmit and receive) is selected as high
priority channel.
Channel 2 (transmit and receive) is selected as high
priority channel.
Channel 3 (transmit and receive) is selected as high
priority channel.
244
Detailed Register Description
PEB 20534
PEF 20534
2000-05-30
(-)
(-)
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