peb20534h-52 Infineon Technologies Corporation, peb20534h-52 Datasheet - Page 45
peb20534h-52
Manufacturer Part Number
peb20534h-52
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20534H-52.pdf
(439 pages)
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Table 5
Pin No.
81
92
173
184
Data Sheet
Symbol
RTS0
RTS1
RTS2
RTS3
or
TxCLKO0
TxCLKO1
TxCLKO2
TxCLKO3
Serial Communication Controller (SCC) Signals (cont’d)
Input (I)
Output (O)
O
Function
Request to Send
When the RTS bit in the CCR1 register is set,
the RTS signal goes low. When the RTS bit is
reset, the signal goes high if the transmitter
has finished and there is no further request for
a transmission.
In bus configuration, RTS can be programmed
via CCR1 to:
– go low during the actual transmission of a
– go low during reception of a data frame.
– stay always high (RTS disabled).
In ASYNC mode, RTS can be programmed
via CCR1 to:
– to be controlled autonomously by the SCCn
– to be controlled autonomously by the SCCn
– to be controlled by the host.
Transmit Clock Out
In clock mode 4 the internal transmit clock is
switched to this pin if bit CCR1.TCLKO set.
TxCLKOi will be in phase with the
corresponding transmit data signal TxDi with
regard to the High Speed timing
Characteristics.
Note: It is recommended to ignore signal RTS
45
frame shifted by one clock period, excluding
collision bits.
and
transmission starts and deactivated when
transmission is completed (default state).
for bi-directional flow control and to be
forced active when shadow part of RFIFO is
empty and forced in-active when RFIFO has
reached a threshold.
in High Speed mode if CCR1.TCLKO is
not set. Nevertheless the signal remains
an active push/pull output.
be
activated
when
Pin Descriptions
PEB 20534
PEF 20534
a
2000-05-30
frame
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