ptn3700 NXP Semiconductors, ptn3700 Datasheet - Page 18

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ptn3700

Manufacturer Part Number
ptn3700
Description
1.8 V Simple Mobile Interface Link Bridge Ic
Manufacturer
NXP Semiconductors
Datasheet

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Part Number:
ptn3700EV/G,118
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PTN3700_1
Product data sheet
7.6 Link error detection and correction
Table 10.
In Transmitter mode, PTN3700 calculates an odd parity bit and merges this into the
serialized output data stream to allow the receiver to detect whether parity has been
violated for its received input data. The parity bit CP is calculated across the 27-bit input
data word (R[7:0], G[7:0], B[7:0], HS, VS and DE) for every pixel transmitted, as shown in
Table
Table 11.
In Receiver mode, the received encoded parity bit CP is compared against the received
27-bit input data word (R[7:0], G[7:0], B[7:0], HS, VS and DE) for every pixel, and an error
is flagged by setting parity error output CPO HIGH for the duration of the pixel clock period
in which the error was detected. Note that the auxiliary output bits A[1:0] are excluded
from the parity detection.
In addition, during the pixel clock period in which the error occurs, the last valid pixel word
is output to R[7:0], G[7:0], B[7:0], HS, VS and DE instead of the current erroneous pixel
data. The last valid pixel word is defined as the data prior to the first parity error detected
in any concatenation of parity errors.
If a parity error is detected but no valid previous pixel information is available, the receiver
will output values R[7:0] = G[7:0] = B[7:0] = HS = VS = HIGH, and DE = LOW. The truth
table for receiver parity function is shown in
not affected by the last valid pixel repetition.
Inputs
XSD
L
H
H
XSD
H
H
H
L
11. Note that the auxiliary bits A[1:0] are excluded from the parity calculation.
CLK+, CLK
X or floating
stopped
running
Power modes - Receiver mode
Parity encoding function table - Transmitter mode
X or floating
stopped
running
running
PCLK
State of serial data inputs
D0+, D0 , D1+, D1 , D2+, D2
resistively pulled H or L
resistively pulled H or L
normal receiver state
Rev. 01 — 14 August 2007
(R[7:0], G[7:0], B[7:0], HS, VS, DE)
Inputs
X or floating
X or floating
of inputs = H
Table
1.8 V simple mobile interface link bridge IC
even
odd
12. Note that the auxiliary bits A[1:0] are
Power
mode
Shutdown
Standby
Active
Data Outputs
R[7:0], G[7:0],
B[7:0], HS, VS
H
H
active data
Encoded parity bit
PTN3700
© NXP B.V. 2007. All rights reserved.
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CP
H
L
DE, PCLK
L
L
active
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