ptn3700 NXP Semiconductors, ptn3700 Datasheet - Page 7

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ptn3700

Manufacturer Part Number
ptn3700
Description
1.8 V Simple Mobile Interface Link Bridge Ic
Manufacturer
NXP Semiconductors
Datasheet

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Table 3.
[1]
PTN3700_1
Product data sheet
Symbol
Parallel data inputs
R[7:0], G[7:0], B[7:0]
HS
VS
DE
A0, A1
High-speed serial outputs
D0+, D0 , D1+, D1 ,
D2+, D2
CLK+, CLK
Clock inputs
PCLK
Configuration inputs
TX/RX
LS0, LS1
PSEL0, PSEL1
XSD
FSS
Power supply
VDD
VDDA
GNDA
GND
Miscellaneous
CPO, FM, F/XS
Depends on configuration.
Pin description - Transmitter mode
6.2 Pin description
Pin
[1]
Type
CMOS
CMOS
CMOS
CMOS
CMOS
SubLVDS
driver
SubLVDS
driver
CMOS
CMOS
CMOS
CMOS
CMOS
CMOS
power
power
ground
ground
CMOS
Description
8-bit wide R, G, B pixel data inputs
Horizontal synchronization data input, active LOW
Vertical synchronization data input, active LOW
Data Enable input, active HIGH
Auxiliary input bits
Serialized high-speed differential subLVDS data outputs
Serialized high-speed differential subLVDS clock outputs
Pixel clock reference input
Transmitter/Receiver configuration input pin. When HIGH, PTN3700 is
configured as transmitter.
Serialization mode program pins. Select between 1, 2 or 3 lanes. See
Pin mirroring select pins. See
Shutdown mode input pin, active LOW, puts PTN3700 in lowest-power mode
by deactivating all circuitry. When HIGH, PTN3700 is either in Active mode or
awaiting clock input (Standby mode)
Fully Source Synchronous select pin. When LOW, PTN3700 uses pseudo
source synchronous serial transmission mode with the pixel clock as both the
reference frequency and the frame boundary delineation. When HIGH,
PTN3700 uses true source synchronous transmission with a serial
Double Data Rate (DDR) bit clock for the serial data. Embedded
synchronization words are encoded for pixel synchronization. On both
Receiver and Transmitter, the settings of the FSS pin should match. Otherwise
the link will not function.
power supply voltage
analog (PLL) power supply voltage
analog (PLL) ground
ground
Signals are inactive in Transmitter mode and should be tied down to GND.
Rev. 01 — 14 August 2007
1.8 V simple mobile interface link bridge IC
Table 6
and
Table 7
PTN3700
© NXP B.V. 2007. All rights reserved.
Table
7 of 41
5.

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