w83977atg Winbond Electronics Corp America, w83977atg Datasheet - Page 64

• Manufacturer Part Number: w83977atg
• Description: W83877tf Plus Kbc, Gp I/o, Wake-up, Fir, Cir, Pb-free
• Manufacturer: Winbond Electronics Corp America

TABLE: FIFO TRIGGER LEVEL
Bit 4, 5: Reserved
Bit 3: When this bit is programmed to logic 1, the DMA mode will change from mode 0 to mode 1 if
Bit 2: Setting this bit to a logical 1 resets the TX FIFO counter logic to its initial state. This bit will be
Bit 1: Setting this bit to logical 1 resets the RX FIFO counter logic to its initial state. This bit will be
Bit 0: This bit enables the 16550 (FIFO) mode of the IR. This bit should be set to logical 1 before
Advanced IR:
Bit 7, 6:
Bit 5, 4:
BIT 7
UFR bit 0 = 1.
cleared to logical 0 by itself after being set to logical 1.
cleared to a logical 0 by itself after being set to logical 1.
other bits of UFR can be programmed.
0
0
1
1
RXFTL1, 0
(BIT 7, 6)
RXFTL1, 0 - Receiver FIFO Threshold Level
Its definition is the same as Legacy IR. RXTH_I becomes 1 when the Receiver FIFO
Threshold Level is equal to or larger than the defined value shown as follow.
Note that the FIFO Size is selectable in SET2.Reg4.
TXFTL1, 0 - Transmitter FIFO Threshold Level
TXTH_I (Transmitter Threshold Level Interrupt) is set to 1 when the Transmitter
Threshold Level is less than the programmed value shown below.
00
01
10
11
BIT 6
0
1
0
1
RX FIFO THRESHOLD LEVEL
(FIFO SIZE: 16-BYTE)
RX FIFO INTERRUPT ACTIVE LEVEL (BYTES)
14
1
4
8
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W83977ATF/W83977ATG
01
04
08
14
RX FIFO THRESHOLD LEVEL
(FIFO SIZE: 32-BYTE)
16
26
1
4