hd64338023s Renesas Electronics Corporation., hd64338023s Datasheet - Page 128
hd64338023s
Manufacturer Part Number
hd64338023s
Description
Renesas 8-bit Single-chip Microcomputer Super Low Power Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.HD64338023S.pdf
(697 pages)
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Section 3 Exception Handling
Bits 1 and 0—IRQ
Bit n
IRRIn
0
1
Interrupt Request Register 2 (IRR2)
IRR2 is an 8-bit read/write register, in which a corresponding flag is set to 1 when a direct
transfer, A/D converter, Timer G, Timer FH, Timer FL, Timer C, or asynchronous event counter
interrupt is requested. The flags are not cleared automatically when an interrupt is accepted. It is
necessary to write 0 to clear each flag.
Bit 7—Direct Transfer Interrupt Request Flag (IRRDT)
Bit 7
IRRDT
0
1
Rev. 7.00 Mar 10, 2005 page 86 of 652
REJ09B0042-0700
Bit
Initial value
Read/Write
Note: * Only a write of 0 for flag clearing is possible
Description
Clearing conditions:
When IRRIn = 1, it is cleared by writing 0
Setting conditions:
When pin
input
Clearing conditions:
When IRRDT = 1, it is cleared by writing 0
Setting conditions:
When a direct transfer is made by executing a SLEEP instruction while DTON = 1 in
SYSCR2
Description
IRRDT
R/(W) *
1
7
0
and IRQ
I R Q n
IRRAD
R/(W) *
is designated for interrupt input and the designated signal edge is
0
6
0
Interrupt Request Flags (IRRI1 and IRRI0)
W
5
IRRTG
R/(W) *
4
0
IRRTFH
R/(W) *
3
0
IRRTFL
R/(W) *
2
0
IRRTC
R/(W) *
1
0
(initial value)
(initial value)
(n = 1 or 0)
IRREC
R/(W) *
0
0
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