hd64338023s Renesas Electronics Corporation., hd64338023s Datasheet - Page 318

• Manufacturer Part Number: hd64338023s
• Description: Renesas 8-bit Single-chip Microcomputer Super Low Power Series
• Manufacturer: Renesas Electronics Corporation.

Section 9 Timers
TCF Clear Timing
TCF can be cleared by a compare match with OCRF.
Timer Overflow Flag (OVF) Set Timing
OVF is set to 1 when TCF overflows from H'FFFF to H'0000.
Compare Match Flag Set Timing
The compare match flag (CMFH or CMFL) is set to 1 when the TCF and OCRF values match.
The compare match signal is generated in the last state during which the values match (when TCF
is updated from the matching value to a new value). When TCF matches OCRF, the compare
match signal is not generated until the next counter clock.
Timer F Operation Modes
Timer F operation modes are shown in table 9.9.
Table 9.9
Operation Mode
TCF
OCRF
TCRF
TCSRF
Note: * When φ
Rev. 7.00 Mar 10, 2005 page 276 of 652
REJ09B0042-0700
system clock and internal clock are mutually asynchronous, synchronization is maintained
by a synchronization circuit. This results in a maximum count cycle error of 1/φ (s). When
the counter is operated in subactive mode, watch mode, or subsleep mode, φ
selected as the internal clock. The counter will not operate if any other internal clock is
selected.
Timer F Operation Modes
w
/4 is selected as the TCF internal clock in active mode or sleep mode, since the
Reset
Reset
Reset
Reset
Reset
Active
Functions Functions Functions/
Functions Held
Functions Held
Functions Held
Sleep
Watch
Halted *
Held
Held
Held
Sub-
active
Functions/
Halted *
Functions
Functions
Functions
Sub-
sleep
Functions/
Halted *
Held
Held
Held
Standby
Halted
Held
Held
Held
w
/4 must be
Module
Standby
Halted
Held
Held
Held