pef20550 Infineon Technologies Corporation, pef20550 Datasheet - Page 109

• Manufacturer Part Number: pef20550
• Description: Extended Line Card Interface Controller Elic
• Manufacturer: Infineon Technologies Corporation

3.8.2.4 Initialization of the Upstream Data Memory (DM) Tristate Field
For each PCM time slot the tristate field defines whether the contents of the DM-data
field are to be transmitted (low impedance), or whether the PCM time slot shall be set to
high impedance. The contents of the tristate field is not modified by a hardware reset. In
order to have all PCM time slots set to high impedance upon the activation of the PCM-
interface, each location of the tristate field must be loaded with the value ’0000’. For this
purpose, the "tristate reset" command can be used:
The initialization of the complete tristate field takes 1035 RCL-cycles.
Note: It is also possible to program the value ’1111’ to the tristate field in order to have
Note: While OMDR:PSB = 0, all PCM-output drivers are set to high impedance,
3.8.3
To initialize the SACCO, the CPU has to write a minimum set of registers. Depending on
the operating mode and on the features required, an optional set of register must also
be initialized.
As the first register to be initialized, the MODE-register defines operating and address
mode. If data reception shall be performed, the receiver must be activated by setting the
RAC-bit. Depending on the mode selected, the following registers must also be defined:
Semiconductor Group
all time slots switched to low impedance upon the activation of the PCM-interface.
regardless of the values written to the tristate field.
OMDR =
MADR =
MACR =
Wait for STAR:MAC = 0
SACCO-Initialization
C0
00
68
H
H
H
; OMS1..0 = 11, normal mode
; code field value ’0000’
; MOC-code to initialize all tristate locations (1101
109
B
Operational Description
PEB 20550
PEF 20550
B
)
01.96