pef20550 Infineon Technologies Corporation, pef20550 Datasheet - Page 80

• Manufacturer Part Number: pef20550
• Description: Extended Line Card Interface Controller Elic
• Manufacturer: Infineon Technologies Corporation

Compared to the Version 1.2 the Version 1.3 provides new features:
Push-pull operation may be selected in bus configuration (up to Version 1.2 only open
drain):
• When active TXDA / TXDB outputs serial data in push-pull-mode.
• When inactive (interframe or inactive timeslots) TXDA / TXDB outputs ’1’.
Note: When bus configuration with direct connection of multiple ELIC’s is used open
Timing Mode
When the multi master configuration has been selected, the SACCO provides two timing
modes, differing in the period between sending data and evaluating the transmitted data
for collision detection.
– Timing mode 1 (CCR1:SC1, SC0 = 01)
– Timing mode 2 (CCR1:SC1, SC0 = 11)
2.2.7.8 Test Mode
To provide support for fast and efficient testing, the SACCO can be operated in the test
mode by setting the TLP-bit in the MODE-register.
The serial input and output pins (TxD, RxD) are connected generating a local loop back.
As a result, the user can perform a self-test of the SACCO. Transmit lines TXDA/B are
also active in this case, receive inputs RXDA/B are deactivated.
Semiconductor Group
Data is output with the rising edge of the transmit clock via TxD and evaluated 1/2
clock period later with the falling clock edge at the CxD pin.
Data is output with the falling clock edge and evaluated with the next falling clock
edge. Thus a complete clock period is available during data output and their
evaluation.
drain option is still recommended.
The push-pull option with bus configuration can only be used if an external tri-state
buffer is placed between TXDA / TXDB and the bus.
Due to the delay of TSCA / TSCB in this mode (see description of bits SOC(0:1)
in register CCR2 (chapter 4.7.9)) these signals cannot directly be used to enable
this buffer.
80
Functional Description
PEB 20550
PEF 20550
01.96