pef20550 Infineon Technologies Corporation, pef20550 Datasheet - Page 256
pef20550
Manufacturer Part Number
pef20550
Description
Extended Line Card Interface Controller Elic
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEF20550.pdf
(407 pages)
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Table 40 shows all available Control Memory codes.
Table 40
Control Memory Codes
Application
Disable connection
Switched 8 bit channel
Switched 4 bit channel
Switched 4 bit channel
Switched 2 bit channel
Switched 2 bit channel
Switched 2 bit channel
Switched 2 bit channel
Preprocessed channel
Preprocessed channel
Preprocessed channel
Examples
In CFI mode 2, CFI timeslot 123 shall be initialized as a switched channel. The CM data
field value therefore represents a pointer to the PCM interface.
In a first step, a timeslot assignment to PCM port 1, timeslot 34 (PCM mode 1) shall be
made for a 64 kBit/s upstream connection:
W:MADR
W:MAAR
W:MACR
In a next step, the bandwidth of the previously made connection shall be verified:
W:MAAR
W:MACR
wait for STAR:MAC = 0
R:MADR
Semiconductor Group
P channel
= 1100 0110
= 1111 1011
= 0111 0001
= 1111 1011
= 1111 0000
= XXXX 0001
CMC3 … 0
0000
0001
0011
0010
0111
0110
0101
0100
1000
1010
1011
1001
B
B
B
B
B
B
; upstream PCM timeslot 34, port 1
; address of upstream CFI timeslot 123
; write data + code field command, code ‘0001’
; address of upstream CFI timeslot 123
; read back code field command
; the code ‘0001’ (64 kBit/s channel) is read back
Transferred Bits
–
bits 7 … 0
bits 7 … 4
bits 3 … 0
bits 7 … 6
bits 5 … 4
bits 3 … 2
bits 1 … 0
refer to chapter 5.5
refer to chapter 5.6
and chapter 5.7
256
Channel Bandwidth
unassigned
64 kBit/s
32 kBit/s
32 kBit/s
16 kBit/s
16 kBit/s
16 kBit/s
16 kBit/s
Application Hints
PEB 20550
PEF 20550
01.96
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