peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 353
![no-image](/images/no-image-200.jpg)
peb3456e
Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456E.pdf
(424 pages)
- Current page: 353 of 424
- Download datasheet (6Mb)
FRS
T1/E1 Receive Status Register
Access
Address
Reset Value
Each bit in the framer receive status register declares a specific condition dependent on
the selected modes. The following convention applies to the individual bits:
0
1
The change of status bit (except FSRF) can also be used to generate a framer interrupt
vector. See also register IMR which describes how to enable/disable interrupt vector
generation and refer to the description of framer interrupt vector on page
Interrupts” on Page
NMF
LOS
Data Sheet
15
0
NMF LOS
14
13
: read/write
: 40
: 0000
The named status is not or no longer existing.
The named status is currently effective.
No Multiframe Found
E1: CRC-4 Interworking
This bit is set, if no multiframe is found after 400 milliseconds.
Loss of Signal (Red Alarm)
This bit is set, when the ’Loss of Signal’ condition has been detected.
T1
Detection
An alarm will be generated if the incoming data stream remain at logical
zero for 168 cycles.
Recovery
The recovery procedure starts after detecting a logical 1. The LOS alarm
is cleared if 21 one’s are detected within 168 bits (12.5%).
E1
see T1 and
Page
AIS
12
H
98.
137.
H
LFA RRA LMFA FSRF
11
“Error Performance Monitoring and Alarm Handling” on
10
9
8
353
0
0
0
0
Register Description
PDEN
AUX
3
LLBDD LLBAD
2
PEB 3456 E
“Layer One
1
05.2001
PRBS
0
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