peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 48
![no-image](/images/no-image-200.jpg)
peb3456e
Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456E.pdf
(424 pages)
- Current page: 48 of 424
- Download datasheet (6Mb)
3.2
•
Figure 3-1
3.3
The device consists of several macro functions as shown in Figure 3-1. The internal
modules are connected by busses/signals according to Infineons on-chip bus.
The main busses are:
• The initiator bus, on which the DMA requests of the data management units and the
Data Sheet
interrupt controller are arbitrated and funneled into the PCI interface.
Interface
SPI
interface
JTAG
controller
TM
Interrupt
Block Diagram
Internal Interface
TE3-CHATT Block Diagram
Initiator bus
Data management unit
1
Protocol handler
PCI Interface
Internal Buffer
DS3 interface unipolar or
Loop buffer
2
B3ZS encoded
M13 Multiplexer
PCI
DS3 framer
T1/E1 Interface/Unchannelized Interface
48
synchronization
References
28
Clock
local uP interface
Local Bus Interface
Facility data link
Message FIFO
Interrupt FIFO
BERT
Framer
General Overview
PEB 3456 E
Overhead
Access
CTCLK
TestPort
05.2001
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