tmp89fm43l TOSHIBA Semiconductor CORPORATION, tmp89fm43l Datasheet - Page 217

• Manufacturer Part Number: tmp89fm43l
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA005
14.4.6
14.4.6.1
14.4.6.2
14.4.6.3
TC00 and TC01 are cascaded to form a 16-bit timer counter, which can measure a longer period than an 8-bit
timer.
In the 16-bit event counter mode, the up counter counts up at the falling edge of the input to the TC00 pin.
16-bit event counter mode
settings of TC00 are ignored and those of TC01 are effective in the 16-bit timer mode.
"1".
T01REG. Set the lower 8 bits of the 16-bit value at T00REG and set the higher 8 bits at T01REG. (Hereinafter,
the 16-bit value specified by the combined setting of T01REG and T00REG is indicated as T01+00REG.)
The timer register settings are reflected on the double buffer or T01+00REG when a write instruction is
executed on T01REG. Be sure to execute the write instructions on T00REG and T01REG in this order. (When
data is written to the high-order register, the set values of the low-order and high-order registers become
effective at the same time.)
becomes invalid. Be sure to complete the required mode settings before starting the timer. (Make settings
when T001CR<T00RUN> and <T01RUN> are "0".)
pin. When a match between the up counter value and the T00+01REG set value is detected, an INTTC01
interrupt request is generated and the up counter is cleared to "0x0000". After being cleared, the up counter
restarts counting. Setting T001CR<T01RUN> to "0" during the timer operation makes the up counter stop
counting and be cleared to "0x0000".
(in SLOW1/2 or SLEEP1 mode), and a pulse width of two machine cycles or more is required at both the "H"
and "L" levels.
Setting T001CR<TCAS> to "1" connects TC00 and TC01 and activates the 16-bit timer mode. All the
The 16-bit timer mode is activated by setting T01MOD<TCM1> to "00" or "01" and T01MOD<EIN0> to
Set the count value to be used for the match detection as a 16-bit value at the timer registers T00REG and
Set T01MOD<DBE1> to "1" to use the double buffer.
Setting T001CR<T01RUN> to "1" starts the operation. After the timer is started, writing to T01MOD
Setting T001CR<T01RUN> to "1" allows the 16-bit up counter to increment at the falling edge of the TC00
The maximum frequency to be supplied is fcgck/2 [Hz] (in NORMAL1/2 or IDLE1/2 mode) or fs/2
Refer to 14.4.5.3.
Setting
Operations
Double buffer
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TMP89FM43L
4
[Hz]