tmp89fm43l TOSHIBA Semiconductor CORPORATION, tmp89fm43l Datasheet - Page 243

• Manufacturer Part Number: tmp89fm43l
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

RA001
16.5
16.5.1
16.5.2
Table 16-4 Transition of Register Status
Activation of STOP, IDLE0 or SLEEP0 Mode
UART0CR1
UART0CR2
comes the status as shown in Table 16-4. For the registers that do not hold their values, make settings again as
needed after the operation mode is recovered.
16-5, whether data is transmitted/received or the operation is stopped.
UART0SR
UART0DR
RD0BUF
TD0BUF
When the STOP, IDLE0 or SLEEP0 mode is activated, the UART stops automatically and each register be-
When the IDLE0, SLEEP0 or STOP mode is activated, the TXD pin reverts to the status shown in Table
Transition of register status
Transition of TXD pin status
Table 16-5 TXD Pin Status When the STOP, IDLE0 or SLEEP0 Mode Is Activated
<IRDASEL>
UART0CR1
Cleared to 0 Cleared to 0
Cleared to 0 Cleared to 0 Cleared to 0
Hold the val-
UART0DR7
Indetermi-
Indetermi-
RD0DR7
TD0DR7
PERR
"0"
"1"
TXE
nate
nate
ue
7
-
-
Hold the val-
UART0DR6
Indetermi-
Indetermi-
RD0DR6
IDLE0 or SLEEP0 mode
TD0DR6
FERR
RXE
nate
nate
ue
6
-
-
H level
L level
Hold the val-
Hold the val-
Hold the val-
UART0DR5
Indetermi-
Indetermi-
STOPBT
RD0DR5
TD0DR5
OERR
nate
nate
ue
ue
ue
5
Page 229
SYSCR1<OUTEN>="1"
Hold the val-
Hold the val-
Hold the val-
UART0DR4
Indetermi-
Indetermi-
RD0DR4
TD0DR4
RTSEL
EVEN
nate
nate
ue
ue
ue
4
-
-
H level
L level
Hold the val-
Hold the val-
Hold the val-
Cleared to 0 Cleared to 0 Cleared to 0 Cleared to 0
UART0DR3
Indetermi-
Indetermi-
RD0DR3
TD0DR3
RBSY
STOP mode
nate
nate
PE
ue
ue
ue
3
SYSCR1<OUTEN>="0"
Hold the val-
Hold the val-
Hold the val-
UART0DR2
Indetermi-
Indetermi-
IRDASEL
RD0DR2
TD0DR2
RBFL
nate
nate
ue
ue
ue
2
Hi-Z
RXDNC
Hold the val-
Hold the val-
Hold the val-
UART0DR1
Indetermi-
Indetermi-
RD0DR1
TD0DR1
TBSY
BRG
nate
nate
ue
ue
ue
1
TMP89FM43L
Hold the val-
Hold the val-
UART0DR0
Indetermi-
Indetermi-
STOPBR
RD0DR0
TD0DR0
TBFL
nate
nate
ue
ue
0
-
-