tmp89fm43l TOSHIBA Semiconductor CORPORATION, tmp89fm43l Datasheet - Page 310

• Manufacturer Part Number: tmp89fm43l
• Description: 8 Bit Microcontroller Tlcs-870/c1 Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

18.5
Data Transfer of I
RA002
18.5.4
Table 18-5 Operation in the Slave Mode
SBI0SR2<
Note:In the slave mode, if the slave address set in I2C0AR<SA> is "0x00", a START Byte "0x01" in I
TRX>
SBI0CR2<MST>, SBI0CR2<TRX> and SBI0CR2<PIN> and clearing SBI0CR2<BB> to "0". Do not modify
the contents of SBI0CR2<MST>, SBI0CR2<TRX>, SBI0CR2<BB> and SBI0CR2<PIN> until a stop condition
is generated on a bus.
condition after a SCL line is released.
2
1
0
C Bus
When SBI0CR2<BB> is "1", a sequence of generating a stop condition is started by setting "1" to
When a SCL line on a bus is pulled down by other devices, a serial bus interface circuit generates a stop
The time from the releasing SCL line until the generating the STOP condition takes t
is received, the device detects slave address match and SBI0CR2<TRX> is set to "1". Do not set I2C0AR<SA>
to "0x00".
es according to conditions listed in Table 18-5.
Stop condition generation
Check SBI0SR2<AL>, SBI0SR2<TRX>, SBI0SR2<AAS> and SBI0SR2<AD0> and implement process-
SBI0SR2<
AL>
1
0
1
0
SBI0SR2<
AAS>
1
1
0
1
0
1
0
SBI0SR2<
AD0>
1/0
1/0
1/0
0
0
0
0
The serial bus interface circuit loses arbi-
tration when transmitting a slave address,
and receives a slave address of which the
value of the direction bit sent from another
master is "1".
In the slave receiver mode, the serial bus
interface circuit receives a slave address
of which the value of the direction bit sent
from the master is "1".
In the slave transmitter mode, the serial
bus interface circuit finishes the transmis-
sion of 1-word data
The serial bus interface circuit loses arbi-
tration when transmitting a slave address,
and receives a slave address of which the
value of the direction bit sent from another
master is "0" or receives a "GENERAL
CALL".
The serial bus interface circuit loses arbi-
tration when transmitting a slave address
or data, and terminates transferring the
word data.
In the slave receiver mode, the serial bus
interface circuit receives a slave address
of which the value of the direction bit sent
from the master is "0" or receives "GEN-
ERAL CALL".
In the slave receiver mode, the serial bus
interface circuit terminates the receipt of
1-word data.
Page 296
Conditions
Set the number of bits in 1 word to
SBI0CR1<BC> and write the transmitted
data to the SBI0DBR.
Check SBI0SR2<LRB>. If it is set to "1", set
SBI0CR2<PIN> to "1" since the receiver
does not request subsequent data. Then,
clear SBI0CR2<TRX> to "0" to release the
bus. If SBI0SR2<LRB> is set to "0", set the
number of bits in 1 word to SBI0CR1<BC>
and write the transmitted data to SBI0DBR
since the receiver requests subsequent da-
ta.
Write the dummy data (0x00) to the
SBI0DBR to set SBI0CR2<PIN> to "1", or
write "1" to SBI0CR2<PIN>.
The serial bus interface circuit is changed
to the slave mode. Write the dummy data
(0x00) to the SBI0DBR to clear
SBI0SR2<AL> to "0" and set
SBI0CR2<PIN> to "1".
Write the dummy data (0x00) to the
SBI0DBR to set SBI0CR2<PIN> to "1", or
write "1" to SBI0CR2<PIN>.
Set the number of bits in 1-word to
SBI0CR1<BC>, read the received data
from the SBI0DBR and write the dummy
data (0x00).
Process
2
C bus standard
HIGH
TMP89FM43L
.