tmp89fm43l TOSHIBA Semiconductor CORPORATION, tmp89fm43l Datasheet - Page 41

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tmp89fm43l

Manufacturer Part Number
tmp89fm43l
Description
8 Bit Microcontroller Tlcs-870/c1 Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
RB000
Note 1: The NORMAL1 and NORMAL2 modes are generically called the NORMAL mode; the SLOW1 and SLOW2 modes
Note 2: The mode is released by the falling edge of the source clock selected at TBTCR<TBTCK>.
2.3.5.4
are called the SLOW mode; the IDLE0, IDLE1 and IDLE2 modes are called the IDLE mode; and the SLEEP0 and
SLEEP1 are called the SLEEP mode.
(a) Single-clock mode
(b) Dual-clock mode
Transition of operation modes
SLEEP1
mode
mode
IDLE0
mode
IDLE2
Figure 2-7 Operation Mode Transition Diagram
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
SYSCR2<IDLE> = "1"
Interrupt
Interrupt
Interrupt
SYSCR2<TGHALT> = ”1”
SYSCR2<SYSCK> = "0"
SYSCR2<XTEN> = "0"
SYSCR2<XEN> = "1"
(Note 2)
NORMAL1
NORMAL2
Page 27
SLEEP0
SLOW2
SLOW1
mode
mode
mode
mode
mode
IDLE0
mode
(Note 2)
SYSCR2<TGHALT> = "1"
SYSCR2<SYSCK> = "1"
SYSCR2<XEN> = "0"
SYSCR2<XTEN> = "1"
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
SYSCR1<STOP> = "1"
Warm-up completed
STOP mode release
STOP mode release
STOP mode release
Warm-up that
follows reset
release
signal
signal
signal
Reset release
STOP
RESET
TMP89FM43L

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