pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 178
pxf4336
Manufacturer Part Number
pxf4336
Description
Abm Premium Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PXF4336.pdf
(425 pages)
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• Periodic Frame Mode:
• Single Step Frame Mode:
The bit-stuffing function is optional. The HDLC frame is transmitted-octet synchronous
starting with the ‘QCITXFRAME’ signal. The ‘QCITXFRAME’ signal may not be asserted
for more than 3 clock cycles. The minimum distance between two frames has to be
payload-length + 16 + 1 or even more if bitstuffing is used.
Figure 5-10 QCI Interface
The bit-pattern length can be limited to 1k, 2k, 4k or 8k (maximum number of
downstream queues). The first data bit of the pattern always represents the threshold
status of queue 0, the second bit represents queue 1 respectively (increasing order).
Data Sheet
The pattern is periodically transmitted with an HDLC framing. The transmit clock is
provided externally.
A single pattern is transmitted with an HDLC framing if the ‘QCITXFRAME’ signal is
asserted. The transmit clock is provided externally.
QCITXFRAME
N-1
QueueThresholdIndication(8191..0)
Table QTI
0
7Eh
1
2
7Eh
QCITXCLK
QCI Interface
1024 Byte (Payload); opt. bit-stuffing
Mini HDLC Engine
read
178
QCITXDAT
Frame N
Note:
1k queues: 128 byte payload
2k queues: 256 byte payload
4k queues: 512 byte payload
8k queues:1024 byte payload
Note:
At 60 MHz, a complete pattern is
transmitted in appr. 0.138ms.
Interface Description
CRC16
8190
8191
PXF 4336 V1.1
7Eh
2001-12-17
ABM-P
7Eh
N+1
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