pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 414

• Manufacturer Part Number: pxf4336
• Description: Abm Premium Atm Buf Fer Manager
• Manufacturer: Infineon Technologies Corporation

8.4.5
Timing of the Synchronous Dynamic RAM (SDRAM) Interface is simplified as all signals
are referenced to the rising edge of RAMCLK. In
signals output by the ABM-P have identical delay times with reference to the clock. When
reading from RAM, the ABM-P samples the data within a window at the rising clock edge.
Figure 8-9
Data Sheet
Table 8-14
No.
110
110A
111
112
113
114
115
CSRDATi(31:0), output
CSRRASi, CSRCASi,
CSRDATi(31:0), input
CSRBAi0, CSRBAi1
CSRCSi, CSRWEi,
Parameter
T
F
Setup time
CSRADRi(13:0), CSRCSi, CSRRASi, CSRCASi,
CSRWEi, CSRBAi0, CSRBAi1 before RAMCLK
rising
Hold time
CSRADRi(13:0), CSRCSi, CSRRASi, CSRCASi,
CSRWEi, CSRBAi0, CSRBAi1 after RAMCLK
rising
Delay CSRDATi Output after RAMCLK rising
Setup time CSRDATi Input before RAMCLK rising
(Read cycles)
Hold time CSRDATi Input after RAMCLK rising
(Read cycles)
CSRADRi(13:0),
RAMCLK
RAMCLK
CSR SDRAM Interface(s)
Generic SDRAM Interface Timing Diagram
SDRAM Interface AC Timing Characteristics
RAMCLK
: Period RAMCLK
: Frequency RAMCLK
414
Figure
111
114
110
Min
2.5
1.5
2.5
1.5
16.7
3
8-9, it can be seen that all
Electrical Characteristics
112
113
115
Limit Values
Typ
PXF 4336 V1.1
Max
60
6.5
2001-12-17
ABM-P
Unit
ns
MHz
ns
ns
ns
ns
ns