pxf4336 Infineon Technologies Corporation, pxf4336 Datasheet - Page 218

no-image

pxf4336

Manufacturer Part Number
pxf4336
Description
Abm Premium Atm Buf Fer Manager
Manufacturer
Infineon Technologies Corporation
Datasheet
Register 19 CLP1DIS
CPU Accessibility:
Reset Value:
Offset Address:
Typical Usage:
Bit
Bit
UCLP1DIS(13:6)
DCLP1DIS(13:6)
Data Sheet
15
7
CLP1 Discard Global Threshold Registers
14
Upstream CLP1 Discard Threshold value
Downstream CLP1 Discard Threshold value
These 8-bit values determine a global 14-bit threshold value
(granularity of 64 cells) that enables discard of low-priority (CLP=’1’)
cells.
The threshold values are compared with the per scheduler low
priority cell counter SBOccLP (Scheduler Block Low Priority
Occupancy) (see Internal Table 5: Scheduler Block Occupancy
Table Transfer Registers SBOC0..SBOC4 ) and enables all CLP1
related discard thresholds, i.e.:
TCT1.BufCiCLP1(7:0) ( Register 40: TCT1 )
TCT2.SBCiCLP1(7:0) ( Register 41: TCT2 )
TCT0.QueueCiCLP1(11:0) ( Register 39: TCT0 )
As a second condition, CLP1 related discard thresholds are only
effective, if the specific queue that is asked to accept the cell is
associated to a traffic class that has EPD function disabled
(EPDen=’0’, see
TCT1, TCT2, TCT3” on Page 241
The CPU programs the threshold with a granularity of 64 cells by
right shifting the value by 6:
xCLP1DIS(13:6):= (threshold_value(13:0) >> 6)
6
Read/Write
0000
CLP1DIS
Written by CPU
H
13
5
2A
“Traffic Class Table Transfer Registers TCT0,
DCLP1DIS(13:6)
UCLP1DIS(13:6)
H
12
4
218
11
3
).
10
2
Register Description
PXF 4336 V1.1
9
1
2001-12-17
ABM-P
8
0

Related parts for pxf4336