lpc2917 NXP Semiconductors, lpc2917 Datasheet - Page 22

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lpc2917

Manufacturer Part Number
lpc2917
Description
Arm9 Microcontroller With Can And Lin
Manufacturer
NXP Semiconductors
Datasheet

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NXP Semiconductors
LPC2917_19_1
Preliminary data sheet
8.3.2.1 Overview
8.3.2.2 Description
8.3.2.3 CFID pin description
8.3.3.1 Overview
8.3.3.2 Description
8.3.3.3 SCU pin description
8.3.4.1 Overview
8.3.1 General subsystem clock description
8.3.2 Chip and feature identification
8.3.3 System Control Unit (SCU)
8.3.4 Event router
8.3 General subsystem
The general subsystem is clocked by CLK_SYS_GESS, see
The key features are:
The Chip/Feature ID (CFID) module contains registers which show and control the
functionality of the chip. It contains an ID to identify the silicon, and also registers
containing information about the features enabled or disabled on the chip.
The CFID has no external pins.
The system control unit takes care of system-related functions.The key feature is
configuration of the I/O port-pins multiplexer.
The system control unit defines the function of each I/O pin of the LPC2917/19. The I/O
pin configuration should be consistent with peripheral function usage.
The SCU has no external pins.
The event router provides bus-controlled routing of input events to the vectored interrupt
controller for use as interrupt or wake-up signals.
Key features:
Identification of product
Identification of features enabled
Up to 24 level-sensitive external interrupt pins, including CAN, LIN and RxD wake-up
features plus three internal event sources
Input events can be used as interrupt source either directly or latched (edge-detected)
Direct events disappear when the event becomes inactive
Latched events remain active until they are explicitly cleared
Programmable input level and edge polarity
Event detection maskable
Rev. 1.01 — 15 November 2007
ARM9 microcontroller with CAN and LIN
Section
LPC2917/19
7.2.2.
© NXP B.V. 2007. All rights reserved.
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