str912fa STMicroelectronics, str912fa Datasheet - Page 14

• Manufacturer Part Number: str912fa
• Description: Arm966e-s? 16/32-bit Flash Mcu With Ethernet, Usb, Can, Ac Motor Control, 4 Timers, Adc, Rtc, Dma
• Manufacturer: STMicroelectronics

Functional overview
Table 3.
2.10
2.10.1 Master clock sources
14/78
31 (low priority)
IRQ Channel
hardware
priority
25
26
27
28
29
30
Clock control unit (CCU)
The CCU generates a master clock of frequency f
generates individually scaled and gated clock sources to each of the following functional blocks
within the STR91xFA.
●
●
●
●
●
●
●
The master clock in the CCU (f
firmware control, the CPU can switch between the three CCU inputs without introducing any
glitches on the master clock output. Inputs to the CCU are:
●
●
●
VIC IRQ Channels
CPU, f
Advanced High-performance Bus (AHB), f
Advanced Peripheral Bus (APB), f
Flash Memory Interface (FMI), f
External Memory Interface (EMI), f
UART Baud Rate Generators, f
USB, f
Main Oscillator (f
crystal connected to STR91xFA pins X1_CPU and X2_CPU, or an external oscillator
device connected to pin X1_CPU.
PLL (f
clock output up to 96 MHz (programmable). By default, at power-up the master clock is
sourced from the main oscillator until the PLL is ready (locked) and then the CPU may
switch to the PLL source under firmware control. The CPU can switch back to the main
oscillator source at any time and turn off the PLL for low-power operation. The PLL is
always turned off in Sleep mode.
RTC (f
X2_RTC, or an external oscillator connected to pin X1_RTC to constantly run the real-time
clock unit. This 32.768 kHz clock source can also be used as an input to the CCU to run
the CPU in slow clock mode for reduced power.
VIC input
channel
VIC1.10
VIC1.11
VIC1.12
VIC1.13
VIC1.14
VIC1.15
VIC1.9
PLL
USB
CPUCLK
RTC
). The PLL takes the 4 to 25 MHz oscillator clock as input and generates a master
). A 32.768 kHz external crystal can be connected to pins X1_RTC and
Wake-up Group 0
Wake-up Group 1 Logic OR of 8 interrupts from pins P5.0 to P5.7
Wake-up Group 2 Logic OR of 8 interrupts from pins P6.0 to P6.7
Wake-up Group 3 Logic OR of 8 interrupts from pins P7.0 to P7.7
OSC
Wake-Up (all)
Logic Block
PFQ-BC
). The source for the main oscillator input is a 4 to 25 MHz external
USB
MSTR
BAUD
) is derived from one of three clock input sources. Under
FMICLK
Logic OR of all 32 inputs of Wake-Up unit (30 pins, RTC, and
USB Resume)
Logic OR of 8 interrupt sources: RTC, USB Resume, pins
P3.2 to P3.7
USB Bus Resume Wake-up (also input to wake-up unit)
Special use of interrupts from Prefetch Queue and Branch
Cache
PCLK
BCLK
HCLK
MSTR
. From this master clock the CCU also
Interrupt Source
STR91xFA