str912fa STMicroelectronics, str912fa Datasheet - Page 15

• Manufacturer Part Number: str912fa
• Description: Arm966e-s? 16/32-bit Flash Mcu With Ethernet, Usb, Can, Ac Motor Control, 4 Timers, Adc, Rtc, Dma
• Manufacturer: STMicroelectronics

STR91xFA
2.10.2 Reference clock (RCLK)
2.10.3 AHB clock (HCLK)
2.10.4 APB clock (PCLK)
2.10.5 Flash memory interface clock (FMICLK)
As an option, there are a number of peripherals that do not have to receive a clock sourced
from the CCU. The USB interface can receive an external clock on pin P2.7, TIM timers TIM0/
TIM1 can receive an external clock on pin P2.4, and timers TIM2/TIM3 on pin P2.5.
Figure 2.
The main clock (f
for the ARM core and all the peripherals. The RCLK provides the divided clock for the ARM
core, and feeds the dividers for the AHB, APB, External Memory Interface, and FMI units.
The RCLK can be divided by 1, 2 or 4 to generate the AHB clock. The AHB clock is the bus
clock for the AHB bus and all bus transfers are synchronized to this clock. The maximum HCLK
frequency is 96 MHz.
The RCLK can be divided by 1, 2, 4 or 8 to generate the APB clock. The APB clock is the bus
clock for the APB bus and all bus transfers are synchronized to this clock. Many of the
peripherals that are connected to the AHB bus also use the PCLK as the source for external
bus data transfers. The maximum PCLK frequency is 48 MHz.
The FMICLK clock is an internal clock derived from RCLK, defaulting to RCLK frequency at
power up. The clock can be optionally divided by 2. The FMICLK determines the bus bandwidth
EXTCLK_T2T3
EXTCLK_T0T1
USB_CLK48M
MII_PHYCLK
X1_CPU
X1_RTC
X1_CPU
X2_RTC
JRTCLK
Clock control
4-25MHz
48MHz
25MHz
32.768 kHz
MSTR
) can be divided to operate at a slower frequency reference clock (RCLK)
Main
OSC
RTC
OSC
External clock
Timer 2 & 3
External clock
Timer 0 & 1
f
OSC
32.768 kHz
f
RTC
RTCSEL
PHYSEL
PLL
f
PLL
Master CLK
f
MSTR
(1,2,4,8,16,1024)
1/2
1/2
RCLK
DIV
To USB
To UART
BRCLK
USBCLK
RCLK
1/2
1/2
Functional overview
AHB DIV
APB DIV)
(1,2,4)
(1,2,4,8)
CPUCLK
FMICLK
EMI_BCLK
PCLK
HCLK
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