str912fa STMicroelectronics, str912fa Datasheet - Page 38

• Manufacturer Part Number: str912fa
• Description: Arm966e-s? 16/32-bit Flash Mcu With Ethernet, Usb, Can, Ac Motor Control, 4 Timers, Adc, Rtc, Dma
• Manufacturer: STMicroelectronics

Pin description
4.2
Notes: 1 STMicroelectronics advises to ground, or pull up to V
Table 5.
38/78
-
-
-
-
-
Pkg
67 L11
69 K10
71 J11
76 H12
78 H10
2 All pins on ports 0 - 9 are 5V tolerant
3 Pins on ports 0,1,2,4,5,7,8,9 have 4 mA drive and 4mA sink. Ports 3 and 6 have 8 mA drive and
4 For 8-bit non-muxed EMI operation: Port 8 is eight bits of data, ports 7 and 9 are 16 bits of
5 For 16-bit muxed EMI operation: Ports 8 and 9 are 16 bits of muxed address and data bits, port
6 Signal polarity is programmable for interrupt request inputs, EMI_ALE, timer input capture
7 HiZ = High Impedance, V = Voltage Source, G = Ground, I/O = Input/Output
8 STR910FA devices do not support USB. On these devices USBDP and USBDN signals are
9 STR910FA 128-pin and 144-ball devices do not support Ethernet. On these devices PHYCLK
Default pin functions
During and just after reset, all pins on ports 0-9 default to high-impedance input mode until
CPU firmware assigns other functions to the pins. This initial input mode routes all pins on ports
0-9 to be read as GPIO inputs as shown in the “Default Pin Function” column of
Simultaneously, certain port pin signals are also routed to other functional inputs as shown in
the “Default Input Function” column of
CPU firmware makes other assignments. At any time, even after the CPU assigns pins to
alternate functions, the CPU may always read the state of any pin on ports 0-9 as a GPIO input.
CPU firmware may assign alternate functions to port pins as shown in columns “Alternate Input
1” or “Alternate Output 1, 2, 3” of
Notes for
pins on port 0 - 9 to reduce noise susceptibility, noise generation, and minimize power
consumption. There are no internal or programmable pull-up resistors on ports 0-9.
8 mA sink.
address.
7 is up to eight additional bits of high-order address
inputs and output compare/PWM outputs, motor control tach and emergency stop inputs, and
motor control phase outputs.
"Not Used" (USBDN is not connected, USBDP must be pulled up by a 1.5K ohm resistor to
VDDQ), and all functions named “USB" are not available.
and all functions named “MII*" are not available.
Pin Name
Device pin description
P0.0
P0.1
P0.2
P0.3
P0.4
Table
I/O
I/O
I/O
I/O
I/O
Default Pin
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
GP Input, HiZ
5:
Function
GPIO_0.0,
GPIO_0.1,
GPIO_0.2,
GPIO_0.3,
GPIO_0.4,
Default Input
PHY Xmit clock
PHY Rx data0
MII_TX_CLK,
PHY Rx data
PHY Rx data
Function
MII_RXD0,
MII_RXD1,
MII_RXD2,
Table 5
-
Table
by writing to control registers at run-time.
I2C0_CLKIN, I2C
I2C1_CLKIN, I2C
TIM0_ICAP1,
Input Capture
Alternate
I2C data in
I2C data in
I2C0_DIN,
I2C1_DIN,
Input 1
5, and these pin input functions will remain until
clock in
clock in
DDQ
Alternate
Output 1
GPIO_0.0,
GP Output
GPIO_0.1,
GP Output
GPIO_0.2,
GP Output
GPIO_0.3,
GP Output
GPIO_0.4,
GP Output
using a 100 K Ω resistor, all unused
Alternate functions
I2C0_CLKOUT, I2C
I2C1_CLKOUT, I2C
EMI Chip Select
Alternate
I2C0_DOUT,
I2C1_DOUT,
I2C data out
I2C data out
Output 2
EMI_CS0n,
clock out
clock out
Table
ETM_PCK0, ETM
ETM_PCK1, ETM
ETM_PCK2, ETM
ETM_PCK3, ETM
STR91xFA
ETM pipe status
ETM_PSTAT0,
Alternate
Output 3
Packet
Packet
Packet
Packet
5.