mc9s08gt32a Freescale Semiconductor, Inc, mc9s08gt32a Datasheet - Page 165
mc9s08gt32a
Manufacturer Part Number
mc9s08gt32a
Description
Hcs08 Microcontrollers 8-bit Microcontroller Family
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC9S08GT32A.pdf
(298 pages)
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When background mode is active, the timer counter and the coherency mechanism are frozen such that the
buffer latches remain in the state they were in when the background mode became active even if one or
both bytes of the counter are read while background mode is active.
10.7.3
The read/write TPM modulo registers contain the modulo value for the TPM counter. After the TPM
counter reaches the modulo value, the TPM counter resumes counting from $0000 at the next clock
(CPWMS = 0) or starts counting down (CPWMS = 1), and the overflow flag (TOF) becomes set. Writing
to TPMxMODH or TPMxMODL inhibits the TOF bit and overflow interrupts until the other byte is
written. Reset sets the TPM counter modulo registers to $0000, which results in a free-running timer
counter (modulo disabled).
It is good practice to wait for an overflow interrupt so both bytes of the modulo register can be written well
before a new overflow. An alternative approach is to reset the TPM counter before writing to the TPM
modulo registers to avoid confusion about when the first counter overflow will occur.
Freescale Semiconductor
Reset
Reset
W
W
R
R
Bit 15
Timer x Counter Modulo Registers (TPMxMODH:TPMxMODL)
Bit 7
0
0
7
7
Figure 10-8. Timer x Counter Modulo Register High (TPMxMODH)
Figure 10-9. Timer x Counter Modulo Register Low (TPMxMODL)
14
0
6
0
6
6
MC9S08GB60A Data Sheet, Rev. 1.02
13
0
5
0
5
5
12
0
4
0
4
4
11
3
0
3
3
0
10
0
2
0
2
2
9
0
1
0
1
1
Timer/PWM (TPM)
Bit 8
Bit 0
0
0
0
0
165
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